Here is the list of FPGA based VLSI projects ideas for experimenting with VHDL and Verilog HDL, for final year projects of electronics engineering students. Below list has VHDL/Verilog coded FPGA based projects for wide applications of DSP image and speech processing, video processing (encoder, decoder, compression), biometrics, wireless security networks, communication systems, automotive electronics, etc.

  • FPGA based Zigbee wireless sensor network controller design using Verilog or VHDL
  • FPGA based DASH7 wireless sensor network controller design using Verilog or VHDL
  • FPGA based Bluetooth wireless network controller design using Verilog or VHDL
  • FPGA based HDMI video encoder/decoder design using Verilog or VHDL
  • FPGA Implementation Huffman Coding For Bit Stream Compression In Mpeg – 2
  • FPGA Implementation Five – Stage Pipelined RISC Processor for Parallel Processing
  • High Definition Television (HDTV) Data Encoding and Decoding using Reed Solomon Code
  • Hardware Algorithm for Variable Precision Multiplication on FPGA
  • FPGA Implementation of Low Power Parallel Multiplier core IP
  • Fault Secure Encoder and Decoder for Nano-memory Applications
  • Enhancement Of Fault Injection Techniques Based On The Modification Of VHDL/Verilog HDL Code
  • VLSI Architecture for Visible Watermarking In A Secure Still Digital Camera (S2dc) Design
  • VHDL/Verilog HDL Model of a IEEE1451.2 Smart Sensor: Characterization and Applications
  • Low Power Test Pattern Generator using A Variable-Length Ring Counter
  • FPGA Design Of Two Wire Serial EEPROM for Embedded Microcontrollers Specification
  • FPGA Design of Diminished-One Modulo 2n+1 Adder using Circular Carry Selection
  • Low-Power Leading-Zero Counting and Anticipation Logic for High-Speed Floating Point Units
  • Low Power Hardware Architecture for VBSME using Pixel Truncation
  • Low Power Design of Precomputation-Based Content-Addressable Memory
  • Left to Right Serial Multiplier for Large Numbers on FPGA
  • Low-Power Fast Counting Bloom Filter Architecture using VHDL/Verilog HDL
  • Improving Error Tolerance for Multi-threaded Register Files using FPGA Design
  • Improvement of the Orthogonal Code Convolution Capabilities using FPGA Implementation
  • VLSI Implementation of Content Addressable Memory for ATM Applications
  • FPGA Design and Implementation of Water Pump Controller using VHDL/Verilog HDL
  • FPGA Design of Reconfigurable Solar Power Inverter Digital Controller
  • FPGA Design and Implementation of Security Surveillance Camera System
  • FPGA Design and Implementation of Robot Movement Stepper Motor Controller
  • FPGA Design and Implementation of I2C Controller Core
  • FPGA Design of Home Electrical Appliances Remote Controller
  • FPGA Design and Implementation of MP3 Encoder & Decoder using VHDL/Verilog HDL
  • VLSI Based Room Temperature Controller Implementation
  • VLSI Architecture and FPGA Prototyping of a Digital Camera for Image Security and Authentication
  • VHDL/Verilog HDL Implementation of Cordic Algorithm for Wireless LAN
  • FPGA Power optimization of linear feedback shift Register (LFSR) for low power BIST
  • Novel Area-Efficient FPGA Architectures for FIR Filtering with Symmetric Signal Extension
  • Low-Power Boundary Scan Testing for Test Data Compression Using A Routing-Driven Scan Architecture
  • Behavioral Synthesis of Asynchronous Circuits using Syntax Directed Translation as Backend
  • FPGA Design of Reconfigurable Coprocessor for Communication Systems
  • FPGA based PC Printer Port / Serial Port interface controller using Verilog HDL
  • FPGA I2C Master Core / SPI Master Core using Verilog HDL

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